Filtering Study of Threading Dislocations in AlN Buffered MBE GaN/Sapphire Using Single and Multiple High Temperature AlN Intermediate Layers

In this study, the correlation between the Emission Microscopy (Em.Mi.) related to the failure site of the 4H-SiC 650V MOSFET devices after reliability test and epitaxial dislocation defects is presented. Devices failed at the High-Temperature Reverse Bias (HTRB) test were considered. Device layers have been stripped out by chemical wet etching and etched in a high temperature KOH solution to characterize defects emerging at the SiC surface. This approach was used to correlate failure emission spots with underlying structure of the material. KOH etching process on delayered devices was performed at 500°C for 10 minutes and then analysis by optical microscopy and SEM was carried out for defect classification and correlation with failure location.

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The Influence of Surface Pit Shape on 4H-SiC MOSFETs Reliability under High Temperature Bias Tests

Materials Science Forum ◽

10.4028/www.scientific.net/msf.858.840 ◽

2016 ◽

Vol 858 ◽

pp. 840-843 ◽

Cited By ~ 7

Author(s):

Kosuke Uchida ◽

Toru Hiyoshi ◽

Taro Nishiguchi ◽

Hirofumi Yamamoto ◽

Shinji Matsukawa ◽

...

Keyword(s):

High Temperature ◽

Electric Field ◽

Epitaxial Layer ◽

Threading Dislocations ◽

Oxide Breakdown ◽

Temperature Bias ◽

Mixed Dislocation ◽

Weibull Plot ◽

Deep Pit ◽

Drain Bias

The influence of surface pit shape on 4H-SiC double implanted MOSFETs (DMOSFETs) reliability under a high temperature drain bias test has been investigated. Threading dislocations formed two types of pit shapes (deep pit and shallow pit) on an epitaxial layer surface. The cause of the failure was revealed to be an oxide breakdown above the pit generated at the threading mixed dislocation in both pit shapes. Weibull distributions between two types of pits were different. Although the DMOSFETs on the epitaxial layer with the deep pit show longer lifetime than those with the shallow pit, the epitaxial layer with the shallow pit is suitable to estimate the lifetime of the DMOSFETs because of a linearity of the Weibull plot. The lifetime of the DMOSFETs with the shallow pit was dominated by an oxide electric field. The maximum oxide electric field required to obtain the lifetime of more than 10 years was estimated to be 2.7 MV/cm.

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Improvement of Crystal Quality of RF-Plasma-Assisted Molecular Beam Epitaxy Grown Ga-Polarity GaN by High-Temperature Grown AlN Multiple Intermediate Layers

Japanese Journal of Applied Physics ◽

10.1143/jjap.39.l330 ◽

2000 ◽

Vol 39 (Part 2, No. 4B) ◽

pp. L330-L333 ◽

Cited By ~ 32

Author(s):

Akihiko Kikuchi ◽

Takayuki Yamada ◽

Shinichi Nakamura ◽

Kazuhide Kusakabe ◽

Daisuke Sugihara ◽

...

Keyword(s):

High Temperature ◽

Molecular Beam Epitaxy ◽

Molecular Beam ◽

Crystal Quality ◽

Rf Plasma ◽

Intermediate Layers

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Polarity control of ZnO films grown with high temperature N-polar GaN intermediate layers by plasma-assisted molecular beam epitaxy

physica status solidi (b) ◽

10.1002/pssb.200405100 ◽

2004 ◽

Vol 241 (12) ◽

pp. 2835-2838 ◽

Cited By ~ 4

Author(s):

O. H. Roh ◽

Y. Tomita ◽

M. Ohsugi ◽

X. Wang ◽

Y. Ishitani ◽

...

Keyword(s):

High Temperature ◽

Molecular Beam Epitaxy ◽

Molecular Beam ◽

Zno Films ◽

Intermediate Layers

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Effect of (La0.5Sr0.5)CoO3 and Pt intermediate layers on improving the stability of Pb1–xLaxTi1–x/4O3 films

Journal of Materials Research ◽

10.1557/jmr.1998.0183 ◽

1998 ◽

Vol 13 (5) ◽

pp. 1286-1290 ◽

Cited By ~ 7

Author(s):

J. P. Wang ◽

Y. C. Ling ◽

Y. K. Tseng ◽

K. S. Liu ◽

I. N. Lin

Keyword(s):

High Temperature ◽

Perovskite Phase ◽

Grazing Angle ◽

Silicon Substrates ◽

Significant Deterioration ◽

Si Substrates ◽

Intermediate Layers ◽

Platinum Coating ◽

The Stability ◽

Si Films

Deposition of a (La0.5Sr0.5)CoO3 (LSCO) layer on top of Pt/Ti/Si substrates was observed to substantially improve the stability of the subsequently deposited Pb1−xLaxTi1−x/4O3 (PLT) films. Platinum coating of silicon substrates by itself is known to enhance the formation of PLT phase. In this paper, the elemental depth profile examined by secondary ion mass spectroscopy (SIMS) and the structural profile examined by grazing angle incident x-ray diffractometry (GIXD) reveals that the Ti species precoated underneath the Pt layer diffuses outward through the Pt layer at high temperature, forming a rutile TiO2 layer on top of Pt coating. It is this outermost TiO2 layer which promotes the transformation kinetics of the PLT species adhered onto substrates into the perovskite phase. Thus obtained films (PLT/Pt/Ti/Si) are, however, not stable enough to survive subsequent high-temperature processing. On the other hand, the PLT/LSCO/Pt/Ti/Si films, which incorporate LSCO as buffer layer, can survive 650 °C without significant deterioration.

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Effect of High Temperature Single and Multiple AlN Intermediate Layers on N-polar and Ga-polar GaN Grown by Molecular Beam Epitaxy

MRS Proceedings ◽

10.1557/proc-693-i3.34.1 ◽

2001 ◽

Vol 693 ◽

Author(s):

F. Fedler ◽

J. Stemmer ◽

R. J. Hauenstein ◽

T. Rotter ◽

A. M. Sanchez ◽

...

Keyword(s):

High Temperature ◽

Molecular Beam Epitaxy ◽

Electron Mobility ◽

Molecular Beam ◽

Threading Dislocation ◽

Electrical Measurements ◽

Force Microscopy ◽

Atomic Force ◽

Intermediate Layers ◽

Transmission Electron

AbstractWurtzite GaN samples containing one, three and five 4nm thick high temperature (HT) AlN Interlayers (IL) have been grown on (0001) sapphire substrates by plasma-assisted molecular beam epitaxy (PAMBE). N-polar as well as Ga-polar thin films have been characterized by x-ray diffraction (XRD), atomic force microscopy (AFM), transmission electron microscopy (TEM), and electrical measurements.All samples under consideration show excellent AFM rms surface roughness below 1nm. Previously, we published a reduction of the threading dislocation (TD) density by a factor of seven due to the introduction of one AlN-IL. When introducing multiple AlN-IL a reduction by a factor of 5.2 is achieved.Hall measurements show a rise in electron mobility due to possible 2DEG formation at the interface between GaN and the AlN-ILs. Significant growth mode differences between Ga-polar and N-polar samples result in drastically higher electron mobility values for N-polar material. For N-polar samples the exceptional mobility increase from 68 (no AlN-IL) to 707 cm2/Vs (one AlN-IL) as well as the extremely low intrinsic carrier density of 1 x 1017 cm-3 prove the applicability of AlN barriers in inverted FET devices.

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Surface Cross-Hatched Morphology on Strained III-V Semiconductor Heterostructures

MRS Proceedings ◽

10.1557/proc-160-129 ◽

1989 ◽

Vol 160 ◽

Cited By ~ 2

Author(s):

Kevin H. Chang ◽

Ronald Gibala ◽

David J. Srolovitz ◽

Pallab K. Bhattacharya ◽

John F. Mansfield

Keyword(s):

High Temperature ◽

Low Temperature ◽

Surface Morphology ◽

Lattice Mismatch ◽

Semiconductor Heterostructures ◽

Surface Pattern ◽

Textured Surface ◽

Threading Dislocations ◽

Misfit Dislocations ◽

Strained Layer

AbstractThe correlation between surface cross-hatched morphology and interfacial misfit dislocations in strained III-V semiconductor heteroepitaxy has been studied. The surface pattern is clearly seen on samples grown at high temperature (520°C) and with lattice mismatch f < 2%. A poorly defined cross-hatched morphology is found on layers grown at low temperature (400°C). For f > 2%, a rough textured surface morphology is observed in place of cross hatching. Few threading dislocations are observed in the strained layer when cross hatch develops. Cross hatch occurs after most interfacial misfit dislocations are generated. The results suggest that surface cross hatch is directly related to the generation and glide of interfacial misfit dislocations.

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Photoluminescence of Extended Defects in Silicon-on-Insulator Formed by Implantation of Oxygen

MRS Proceedings ◽

10.1557/proc-378-629 ◽

1995 ◽

Vol 378 ◽

Cited By ~ 5

Author(s):

Y. H. Qian ◽

J. H. Evans ◽

L. F. Giles ◽

A. Nejim ◽

P. L. F. Hemment

Keyword(s):

High Temperature ◽

Optical Activity ◽

Stacking Faults ◽

Silicon On Insulator ◽

Threading Dislocations ◽

Extended Defects ◽

High Temperature Annealing ◽

Stacking Fault Tetrahedra ◽

Before And After ◽

Dislocation Related Luminescence

AbstractPL and TEM have been carried out on SIMOX structures before and after thinning the silicon overlayer by a process of sacrificial oxidation. The implantation and high temperature annealing schedules involved in fabricating SIMOX material result in threading dislocations and stacking fault tetrahedra and pyramidals in the silicon overlayer. The optical activity of these extended defects is found to be low. However, after the sacrificial oxidation, strong dislocation related luminescence is observed, which is attributed to the presence of oxidation-induced stacking faults now present in the overlayer.

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